/** ****************************************************************************** * @file hal_radio.h * @author William Liang * @version V1.0.0 * @date 09/10/2013 * @brief This file contains the headers of the radio frequency handlers. ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __HAL_sRF_H__ #define __HAL_sRF_H__ /* Includes ------------------------------------------------------------------*/ #include "include.h" #include "stm32f10x.h" #include "sx1276-LoRa.h" /* Exported constants --------------------------------------------------------*/ /** * @brief SPI sRF Frequency Chip Interface pins */ #define sRF_SPI SPI1 #define sRF_SPI_CLK RCC_APB2Periph_SPI1 #define sRF_CS_PIN GPIO_Pin_4 /* PA.4 */ #define sRF_CS_GPIO_PORT GPIOA /* GPIOA */ #define sRF_CS_GPIO_CLK RCC_APB2Periph_GPIOA #define sRF_SPI_SCK_PIN GPIO_Pin_5 /* PB.5 */ #define sRF_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */ #define sRF_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOA #define sRF_SPI_MISO_PIN GPIO_Pin_6 /* PB.6 */ #define sRF_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */ #define sRF_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOA #define sRF_SPI_MOSI_PIN GPIO_Pin_7 /* PB.7 */ #define sRF_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */ #define sRF_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOA #define sRF_SPI_DR_Base (SPI1_BASE + 0x0C) #define sRF_SPI_DMA DMA1 #define sRF_SPI_DMA_CLK RCC_AHBPeriph_DMA1 #define sRF_SPI_DMA_RX_Channel DMA1_Channel4 #define sRF_SPI_DMA_TX_Channel DMA1_Channel5 #define sRF_SPI_DMA_RX_FLAG DMA1_FLAG_TC4 #define sRF_SPI_DMA_TX_FLAG DMA1_FLAG_TC5 /* BEGIN: Added by Barry, 2014/3/4 */ #define sRF_RESET_PORT GPIOA #define sRF_RESET_SCK RCC_APB2Periph_GPIOA #define sRF_RESET_PIN GPIO_Pin_1 #define sRF_DIOx_PORT GPIOB #define sRF_DIOx_SCK RCC_APB2Periph_GPIOB #define sRF_DIO0_PIN GPIO_Pin_13 #define sRF_DIO1_PIN GPIO_Pin_12 //#define sRF_DIO2_PIN GPIO_Pin_1 #define sRF_DIO3_PIN GPIO_Pin_0 //#define sRF_DIO4_PIN GPIO_Pin_4 //#define sRF_DIO5_PIN GPIO_Pin_5 #define sRF_DIO4_PORT GPIOC #define sRF_DIO4_PIN GPIO_Pin_5 //PC5 #define sRF_DIO4_SCK RCC_APB2Periph_GPIOC #define sRF_DIO4_PORT_SOURCE GPIO_PortSourceGPIOC #define sRF_DIO4_PIN_SOURCE GPIO_PinSource5 #define sRF_DIOx_PORT_SOURCE GPIO_PortSourceGPIOB #define sRF_DIO0_PIN_SOURCE GPIO_PinSource13 #define sRF_DIO1_PIN_SOURCE GPIO_PinSource12 #define sRF_DIO2_PIN_SOURCE GPIO_PinSource1 #define sRF_DIO3_PIN_SOURCE GPIO_PinSource0 #define DIO0_IRQ EXTI_Line13 #define DIO1_IRQ EXTI_Line12 #define DIO2_IRQ EXTI_Line1 #define DIO3_IRQ EXTI_Line0 #define DIO4_IRQ EXTI_Line5 #define DIOall_IRQ (DIO0_IRQ | DIO1_IRQ | DIO2_IRQ | DIO3_IRQ | DIO4_IRQ) #define hal_DIOx_ITConfig(n,NewState) hal_sRF_ITConfig(DIO##n##_IRQ,NewState) #define sRF_TX_CTRL_PORT GPIOC #define sRF_TX_CTRL_PIN GPIO_Pin_4 #define sRF_FIFO_ARRD 0 /* END: Added by Barry, 2014/3/4 */ /* Select sRF: Chip Select pin low */ #define sRF_CS_LOW() GPIO_ResetBits(sRF_CS_GPIO_PORT, sRF_CS_PIN) /* Deselect sRF: Chip Select pin high */ #define sRF_CS_HIGH() GPIO_SetBits(sRF_CS_GPIO_PORT, sRF_CS_PIN) #define RFTX_ENABLE GPIO_SetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN) #define RFRX_ENABLE GPIO_ResetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN) #define switch_Tx() GPIO_SetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN) #define switch_Rx() GPIO_ResetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN) /* Disable PA */ #define sRF_PA_DISABLE() GPIO_ResetBits(sRF_PA_CTRL_PORT, sRF_PA_CTRL_PIN) /* Enable PA */ #define sRF_PA_ENABLE() GPIO_SetBits(sRF_PA_CTRL_PORT, sRF_PA_CTRL_PIN) #define sRF_DUMMY_BYTE 0xAA #define sRF_CRYSTALCAP_EEPROM_ADDR 0xFFC1 #define sRF_CHANNEL_NUMBER 66u #define sRF_PREAMBLE_LENGTH 80u //bytes #define sRF_SYNCWORD_LENGTH 2u //bytes #define sRF_FREQ_HOP_TIMEOUT 30u//ms #define sRF_CHECK_SYNCWORD_TIMEOUT 85u //(((sRF_PREAMBLE_LENGTH + sRF_SYNCWORD_LENGTH) * 8) / 10 + 20) //ms #define sRF_FIRST_TX_TIMEOUT 136u //(((sRF_PREAMBLE_LENGTH + sRF_SYNCWORD_LENGTH + FIFO_SIZE) * 8) / 10 + 20) //ms #define sRF_FIFO_TRX_TIMEOUT 71u //((FIFO_SIZE * 8) / 10 + 20) //ms #define sRF_FIFO_DMA_TIMEOUT 20u //ms #define sRF_PACKET_SIZE (aMaxPHYPayloadSize + 6) //258u #define sRF_RSSI_SAMPLE_NUMBER 9u #define sRF_RSSI_SAMPLE_INTERVAL 2u //ms #define sRF_TEST_INTERVAL 1000u //ms #define TOTAL_REGISTER_NUMBER 0x70 #define FIFO_SIZE 255u #define RF_TIMEOUT 3000 #define RXTX( txEnable ) SX1276WriteRxTx( txEnable ) #define TICK_RATE_MS( ms ) ( ms ) #define true TRUE #define false FALSE typedef struct { u16 version; u16 lastBytes; u16 total_packets; u16 current_packet_No; u16 total_bytes; u8 packet_length; }ST_update_slave_info; typedef struct { u8 CadDetected:1; u8 FhssChangeChannel:1; u8 CadDone:1; u8 TxDone:1; u8 ValidHeader:1; u8 PayloadCrcError:1; u8 RxDone:1; u8 RxTimeout:1; }ST_irqFlag; enum { RF_ERR = 0x0000, RF_CAD_DETECT = 0x0001, RF_TX_START = 0x0002, RF_TX_SUCCESS = 0x0004, RF_RX_SUCCESS = 0x0008, RF_RX_FAILED = 0x0010, RF_VALID_HEAD = 0x0020, RF_SET_PARAMS = 0x0040, RF_PREAMBLE_TIMEOUT = 0x0080, }; #endif /* Exported macro ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/ /* Exported functions ------------------------------------------------------- */ void hal_InitRFVariable(void); void hal_InitRF(void); void hal_sRF_InitSPI(void); void hal_sRF_ITConfig(uint32_t irqLine, FunctionalState NewState); u8 hal_sRF_ReadRegister(u8 reg); void hal_sRF_WriteRegister(u8 reg, u8 val); void hal_sRF_DMA_Read(u8 startReg, u8 *pBuffer, u8 length); void hal_sRF_DMA_Write(u8 *pBuffer, u8 length); void hal_sRF_Config(u8 startReg, u8 *pBuffer, u8 length); void hal_sRF_Read(u8 startReg, u8 *pBuffer, u8 length); void hal_sRF_Receive(void); void hal_sRF_Transmit(u8 *pBuffer, u8 length, u8 channel); void hal_sRF_ReadRssi(void); u8 hal_sRF_GetLinkQuality(void); u8 hal_sRF_RssiToLinkQuality(u8 rssi); void hal_sRF_FrequencyHopping(void); void hal_sRF_WhiteningBuffer(u8 *pBuffer, u16 length); bool hal_sRF_CheckPacketValid(u8 *pBuffer, u16 length); void hal_sRF_Sync_Handle(void); void hal_sRF_TRX_Handle(void); u8 spiReadWriteByte(u8 data); void SX1276WriteBuffer( uint8_t addr, uint8_t *buffer, uint8_t size ); void SX1276ReadBuffer( uint8_t addr, uint8_t *buffer, uint8_t size ); void SX1276Write( uint8_t addr, uint8_t data ); void SX1276Read( uint8_t addr, uint8_t *data ); void SX1276WriteFifo( uint8_t *buffer, uint8_t size ); void SX1276ReadFifo( uint8_t *buffer, uint8_t size ); void SX1276SetReset( uint8_t state ); u8 cmp(u8 * buf1, u8* buf2, u8 length); void SX1276WriteRxTx( bool txEnable ); void hal_sRF_SPI_Config(void); void sRFTransmitHandle(void); void TimeOutHandle(void); void hal_sRF_writeFIFO_DMA(u8 * pBuffer, u8 length); void hal_sRF_readFIFO_DMA(u8 * pBuffer, u8 length); void hal_sRF_Transmit(u8 *pBuffer, u8 length, u8 channel); void hal_sRF_FSK_ITConfig( uint32_t irqLine, FunctionalState NewState); void hal_sRF_ITConfig(uint32_t irqLine, FunctionalState NewState); void hal_sRF_ClearAllRF_IT(); #define hal_fsk_eit_failing(n,NewState) hal_sRF_FSK_ITConfig(DIO##n##_IRQ,NewState) /*! * DIO state read functions mapping */ #define DIO(n) GPIO_ReadInputDataBit( sRF_DIOx_PORT, sRF_DIO##n##_PIN ) #define DIO0 DIO(0) #define DIO1 DIO(1) #define DIO2 DIO(2) #define DIO3 DIO(3) #define DIO4 DIO(4) #define DIO5 DIO(5) #define DEBUG /******************* (C) COPYRIGHT 2013 Robulink Technology Ltd.*****END OF FILE****/