639 lines
17 KiB
C
639 lines
17 KiB
C
/*
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* THE FOLLOWING FIRMWARE IS PROVIDED: (1) "AS IS" WITH NO WARRANTY; AND
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* (2)TO ENABLE ACCESS TO CODING INFORMATION TO GUIDE AND FACILITATE CUSTOMER.
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* CONSEQUENTLY, SEMTECH SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR
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* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* Copyright (C) SEMTECH S.A.
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*/
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/*!
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* \file sx1276.c
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* \brief SX1276 RF chip driver
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*
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* \version 2.0.0
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* \date May 6 2013
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* \author Gregory Cristian
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*
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* Last modified by Miguel Luis on Jun 19 2013
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*/
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#include <string.h>
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#include <math.h>
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#include "include.h"
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#include "sx1276-Fsk.h"
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#include "sx1276-FskMisc.h"
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#include "hal_radio.h"
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// Default settings
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tFskSettings FskSettings =
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{
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492000000, // RFFrequency
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10000, // Bitrate
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20000, // Fdev
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0, // Power
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40000, // RxBw
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150000, // RxBwAfc
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true, // CrcOn
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true, // AfcOn
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255 // PayloadLength (set payload size to the maximum for variable mode, else set the exact payload length)
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};
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extern struct etimer timer_rf;
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sRF_FSK g_fsk = {
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.states = RF_STATE_IDLE,
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.index = 0,
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.packetLenth = 0,
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.rssi = 0.0,
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.sync_timeout = 1000,
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.plyloadtimeout = 1000
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};
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void SX1276Fsk_recrive_Packet(void);
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/*!
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* SX1276 FSK registers variable
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*/
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extern uint8_t SX1276Regs[];
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tSX1276* SX1276 = ( tSX1276* )SX1276Regs;;
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/*!
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* Local RF buffer for communication support
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*/
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static uint8_t RFBuffer[RF_BUFFER_SIZE];
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/*!
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* Chunk size of data write in buffer
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*/
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//static uint8_t DataChunkSize = 32;
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/*!
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* RF state machine variable
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*/
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static uint8_t RFState = RF_STATE_IDLE;
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/*!
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* Rx management support variables
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*/
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/*!
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* PacketTimeout holds the RF packet timeout
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* SyncSize = [0..8]
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* VariableSize = [0;1]
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* AddressSize = [0;1]
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* PayloadSize = [0..RF_BUFFER_SIZE]
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* CrcSize = [0;2]
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* PacketTimeout = ( ( 8 * ( VariableSize + AddressSize + PayloadSize + CrcSize ) / BR ) * 1000.0 ) + 1
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* Computed timeout is in miliseconds
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*/
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//static uint32_t PacketTimeout;
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/*!
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* Preamble2SyncTimeout
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* Preamble2SyncTimeout = ( ( 8 * ( PremableSize + SyncSize ) / RFBitrate ) * 1000.0 ) + 1
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* Computed timeout is in miliseconds
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*/
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//static uint32_t Preamble2SyncTimeout;
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//static bool PreambleDetected = false;
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//static bool SyncWordDetected = false;
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//static bool PacketDetected = false;
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static uint16_t RxPacketSize = 0;
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//static uint8_t RxBytesRead = 0;
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//static uint8_t TxBytesSent = 0;
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static double RxPacketRssiValue;
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static uint32_t RxPacketAfcValue;
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static uint8_t RxGain = 1;
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//static uint32_t RxTimeoutTimer = 0;
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//static uint32_t Preamble2SyncTimer = 0;
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//static bool firstReceiveByte = true;
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/*!
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* Tx management support variables
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*/
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static uint16_t TxPacketSize = 0;
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//static uint32_t TxTimeoutTimer = 0;
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void SX1276FskInit( void )
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{
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SX1276FskSetOpMode( RF_OPMODE_SLEEP );
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SX1276->RegOpMode = ( SX1276->RegOpMode & 0x7F ) | 0x00;
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SX1276Write( REG_OPMODE, SX1276->RegOpMode );
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SX1276FskSetOpMode( RF_OPMODE_STANDBY );
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SX1276FskSetDefaults( );
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SX1276ReadBuffer( REG_OPMODE, SX1276Regs + 1, 0x70 - 1 );
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// Set the device in FSK mode and Sleep Mode
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SX1276->RegOpMode = RF_OPMODE_MODULATIONTYPE_FSK | RF_OPMODE_SLEEP;
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SX1276Write( REG_OPMODE, SX1276->RegOpMode );
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SX1276->RegPaRamp = RF_PARAMP_MODULATIONSHAPING_01;
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SX1276Write( REG_PARAMP, SX1276->RegPaRamp );
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SX1276->RegLna = RF_LNA_GAIN_G1;
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SX1276Write( REG_LNA, SX1276->RegLna );
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SX1276->RegRxConfig = ( FskSettings.AfcOn == true ) ? RF_RXCONFIG_AFCAUTO_ON: RF_RXCONFIG_AFCAUTO_OFF;
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SX1276->RegRxConfig |= RF_RXCONFIG_RESTARTRXONCOLLISION_OFF | RF_RXCONFIG_AGCAUTO_ON;// |RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT;
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if( FskSettings.AfcOn == true )
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{
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SX1276->RegRxConfig = RF_RXCONFIG_RESTARTRXONCOLLISION_OFF | RF_RXCONFIG_AFCAUTO_ON |
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RF_RXCONFIG_AGCAUTO_ON;// |RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT;
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}
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else
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{
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SX1276->RegRxConfig = RF_RXCONFIG_RESTARTRXONCOLLISION_OFF | RF_RXCONFIG_AFCAUTO_OFF |
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RF_RXCONFIG_AGCAUTO_ON;// | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT;
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}
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SX1276->RegPreambleLsb = 30;
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SX1276->RegPreambleDetect = RF_PREAMBLEDETECT_DETECTOR_ON | RF_PREAMBLEDETECT_DETECTORSIZE_3 |
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RF_PREAMBLEDETECT_DETECTORTOL_10;
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SX1276->RegRssiThresh = 0xFF;
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SX1276->RegSyncConfig = RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF | RF_SYNCCONFIG_PREAMBLEPOLARITY_AA |
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RF_SYNCCONFIG_SYNC_ON |
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RF_SYNCCONFIG_SYNCSIZE_4;
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SX1276->RegSyncValue1 = 0x69;
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SX1276->RegSyncValue2 = 0x81;
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SX1276->RegSyncValue3 = 0x7E;
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SX1276->RegSyncValue4 = 0x96;
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SX1276->RegPacketConfig1 = RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE | RF_PACKETCONFIG1_DCFREE_OFF |
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( FskSettings.CrcOn << 4 ) | RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF |
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RF_PACKETCONFIG1_ADDRSFILTERING_OFF | RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT;
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SX1276FskGetPacketCrcOn( ); // Update CrcOn on FskSettings
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SX1276->RegPayloadLength = FskSettings.PayloadLength;
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// we can now update the registers with our configuration
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SX1276WriteBuffer( REG_OPMODE, SX1276Regs + 1, 0x70 - 1 );
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// then we need to set the RF settings
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SX1276FskSetRFFrequency( FskSettings.RFFrequency );
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SX1276FskSetBitrate( FskSettings.Bitrate );
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SX1276FskSetFdev( FskSettings.Fdev );
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SX1276FskSetDccBw( &SX1276->RegRxBw, 0, FskSettings.RxBw );
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SX1276FskSetDccBw( &SX1276->RegAfcBw, 0, FskSettings.RxBwAfc );
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SX1276FskSetRssiOffset( 0 );
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SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_RFO );
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//SX1276FskSetPAOutput( RF_PACONFIG_PASELECT_PABOOST );
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SX1276FskSetPa20dBm( false );
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SX1276FskSetRFPower( FskSettings.Power );
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SX1276FskSetOpMode( RF_OPMODE_STANDBY );
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// Calibrate the HF
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SX1276FskRxCalibrate( );
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g_fsk.sync_timeout = (u16)(8*8*1000/FskSettings.Bitrate) + 5;
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g_fsk.plyloadtimeout = (u16)(255*2*8*1000/FskSettings.Bitrate) + 5;
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SX1276Fsk_recrive_Packet();
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}
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void SX1276FskSetDefaults( void )
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{
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// REMARK: See SX1276 datasheet for modified default values.
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SX1276Read( REG_VERSION, &SX1276->RegVersion );
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}
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void SX1276FskSetOpMode( uint8_t opMode )
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{
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static uint8_t opModePrev = RF_OPMODE_STANDBY;
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static bool antennaSwitchTxOnPrev = true;
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bool antennaSwitchTxOn = false;
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opModePrev = SX1276->RegOpMode & ~RF_OPMODE_MASK;
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if( opMode != opModePrev )
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{
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if( opMode == RF_OPMODE_TRANSMITTER )
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{
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antennaSwitchTxOn = true;
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}
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else
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{
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antennaSwitchTxOn = false;
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}
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if( antennaSwitchTxOn != antennaSwitchTxOnPrev )
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{
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antennaSwitchTxOnPrev = antennaSwitchTxOn;
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//RXTX( antennaSwitchTxOn ); // Antenna switch control
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}
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SX1276->RegOpMode = ( SX1276->RegOpMode & RF_OPMODE_MASK ) | opMode;
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SX1276Write( REG_OPMODE, SX1276->RegOpMode );
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}
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}
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uint8_t SX1276FskGetOpMode( void )
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{
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SX1276Read( REG_OPMODE, &SX1276->RegOpMode );
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return SX1276->RegOpMode & ~RF_OPMODE_MASK;
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}
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int32_t SX1276FskReadFei( void )
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{
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SX1276ReadBuffer( REG_FEIMSB, &SX1276->RegFeiMsb, 2 ); // Reads the FEI value
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return ( int32_t )(( double )( ( ( uint16_t )SX1276->RegFeiMsb << 8 ) | ( uint16_t )SX1276->RegFeiLsb ) * ( double )FREQ_STEP);
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}
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int32_t SX1276FskReadAfc( void )
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{
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SX1276ReadBuffer( REG_AFCMSB, &SX1276->RegAfcMsb, 2 ); // Reads the AFC value
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return ( int32_t )(( double )( ( ( uint16_t )SX1276->RegAfcMsb << 8 ) | ( uint16_t )SX1276->RegAfcLsb ) * ( double )FREQ_STEP);
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}
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uint8_t SX1276FskReadRxGain( void )
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{
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SX1276Read( REG_LNA, &SX1276->RegLna );
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return( SX1276->RegLna >> 5 ) & 0x07;
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}
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double SX1276FskReadRssi( void )
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{
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SX1276Read( REG_RSSIVALUE, &SX1276->RegRssiValue ); // Reads the RSSI value
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return -( double )( ( double )SX1276->RegRssiValue / 2.0 );
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}
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uint8_t SX1276FskGetPacketRxGain( void )
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{
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return RxGain;
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}
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double SX1276FskGetPacketRssi( void )
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{
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return RxPacketRssiValue;
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}
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uint32_t SX1276FskGetPacketAfc( void )
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{
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return RxPacketAfcValue;
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}
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/*
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void SX1276FskStartRx( void )
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{
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SX1276FskSetRFState( RF_STATE_RX_INIT );
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}
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*/
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void SX1276FskGetRxPacket( void *buffer, uint16_t *size )
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{
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*size = RxPacketSize;
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RxPacketSize = 0;
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memcpy( ( void * )buffer, ( void * )RFBuffer, ( size_t )*size );
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}
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void SX1276FskSetTxPacket( const void *buffer, uint16_t size )
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{
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TxPacketSize = size;
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memcpy( ( void * )RFBuffer, buffer, ( size_t )TxPacketSize );
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RFState = RF_STATE_TX_INIT;
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}
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// Remark: SX1276 must be fully initialized before calling this function
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uint16_t SX1276FskGetPacketPayloadSize( void )
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{
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uint16_t syncSize;
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uint16_t variableSize;
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uint16_t addressSize;
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uint16_t payloadSize;
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uint16_t crcSize;
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syncSize = ( SX1276->RegSyncConfig & 0x07 ) + 1;
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variableSize = ( ( SX1276->RegPacketConfig1 & 0x80 ) == 0x80 ) ? 1 : 0;
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addressSize = ( ( SX1276->RegPacketConfig1 & 0x06 ) != 0x00 ) ? 1 : 0;
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payloadSize = SX1276->RegPayloadLength;
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crcSize = ( ( SX1276->RegPacketConfig1 & 0x10 ) == 0x10 ) ? 2 : 0;
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return syncSize + variableSize + addressSize + payloadSize + crcSize;
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}
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// Remark: SX1276 must be fully initialized before calling this function
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uint16_t SX1276FskGetPacketHeaderSize( void )
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{
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uint16_t preambleSize;
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uint16_t syncSize;
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preambleSize = ( ( uint16_t )SX1276->RegPreambleMsb << 8 ) | ( uint16_t )SX1276->RegPreambleLsb;
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syncSize = ( SX1276->RegSyncConfig & 0x07 ) + 1;
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return preambleSize + syncSize;
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}
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uint8_t SX1276FskGetRFState( void )
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{
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return RFState;
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}
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void SX1276FskSetRFState( uint8_t state )
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{
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RFState = state;
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}
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void start_continuous_mode(void)
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{
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//4¡¢BitSyncOn
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//5¡¢continuous mode
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//6¡¢RX
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u8 RegDioMapping[2];
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u8 temp = 0;;
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SX1276FskSetOpMode(RF_OPMODE_STANDBY);
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switch_Rx();
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RegDioMapping[0] = RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_00 | RF_DIOMAPPING1_DIO2_11 | RF_DIOMAPPING1_DIO3_10;
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RegDioMapping[1] = RF_DIOMAPPING2_DIO4_00 | RF_DIOMAPPING2_DIO5_11 | RF_DIOMAPPING2_MAP_PREAMBLEDETECT;
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SX1276WriteBuffer( REG_DIOMAPPING1, RegDioMapping, 2 );
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SX1276Read(REG_OOKPEAK, &temp);
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temp |= (0x20);
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SX1276Write(REG_OOKPEAK, temp);
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SX1276Read(REG_PACKETCONFIG2, &temp);
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temp &= (~0x40);
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SX1276Write(REG_PACKETCONFIG2, temp);
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SX1276FskSetOpMode(RF_OPMODE_RECEIVER);
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}
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void packet_tx_data(u8 *PBuffer,u8 length)
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{
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g_fsk.buffer[0] = length;
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memcpy( ( void * )(g_fsk.buffer+1), PBuffer, length);
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g_fsk.packetLenth = length + 1;
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g_fsk.index = 0;
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}
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void fill_fifo(void)
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{
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u8 sendLenth;
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u8 leftlength = g_fsk.packetLenth - g_fsk.index;
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if (g_fsk.index == 0)
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{
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if (leftlength <= 64)
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{
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SX1276WriteFifo(g_fsk.buffer, leftlength);
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g_fsk.index += leftlength;
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hal_DIOx_ITConfig(1,DISABLE);
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}
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else
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{
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SX1276WriteFifo(g_fsk.buffer, 64);
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g_fsk.index += 64;
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}
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}
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else if (g_fsk.index < g_fsk.packetLenth)
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{
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sendLenth = ( leftlength > (FIFO_LENGTH - TX_FIFO_THRESHOLD) ? (FIFO_LENGTH - TX_FIFO_THRESHOLD) : leftlength);
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SX1276WriteFifo(g_fsk.buffer+g_fsk.index, sendLenth);
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g_fsk.index += sendLenth;
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}
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}
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void contious_tx(void)
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{
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SX1276->RegFifoThresh = RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH | TX_FIFO_THRESHOLD; // 24 bytes of data
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SX1276Write( REG_FIFOTHRESH, SX1276->RegFifoThresh );
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switch_Tx();
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SX1276FskSetOpMode( RF_OPMODE_TRANSMITTER );
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}
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void read_fifo(bool rxdone)
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{
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u8 leftlength;
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if (g_fsk.index == 0)
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{
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SX1276ReadFifo(&g_fsk.packetLenth , 1);
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}
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leftlength = g_fsk.packetLenth - g_fsk.index;
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if (rxdone)
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{
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if (leftlength <= FIFO_LENGTH)
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{
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//hal_DIOx_ITConfig(all,DISABLE);
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SX1276ReadFifo(g_fsk.buffer+g_fsk.index, leftlength);
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}
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}
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else
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{
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if (g_fsk.index < (g_fsk.packetLenth -1) )
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{
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SX1276ReadFifo(g_fsk.buffer+g_fsk.index, RX_FIFO_THRESHOLD);
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g_fsk.index += RX_FIFO_THRESHOLD;
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}
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leftlength = g_fsk.packetLenth - g_fsk.index;
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if (leftlength <= FIFO_LENGTH)
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{
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hal_DIOx_ITConfig(1,DISABLE);
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}
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}
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}
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void SX1276Fsk_Send_Packet(u8 *PBuffer,u8 length)
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{
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hal_DIOx_ITConfig(all, DISABLE);
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SX1276FskSetOpMode( RF_OPMODE_STANDBY );
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// PacketSent, FifoLevel, FifoFull, TxReady
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SX1276->RegDioMapping1 = packet_DIO0_packetSend | packet_DIO1_fifoLevel | packet_DIO2_fifoFull | packet_DIO3_TxReady;
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// LowBat, Data
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SX1276->RegDioMapping2 = packet_DIO4_TimeOut | packet_DIO5_Data ;
|
|
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SX1276WriteBuffer( REG_DIOMAPPING1, &SX1276->RegDioMapping1, 2 );
|
|
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SX1276->RegFifoThresh = RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY | TX_FIFO_THRESHOLD; // 24 bytes of data
|
|
SX1276Write( REG_FIFOTHRESH, SX1276->RegFifoThresh );
|
|
|
|
packet_tx_data(PBuffer, length);
|
|
|
|
hal_DIOx_ITConfig(0,ENABLE);
|
|
hal_DIOx_ITConfig(1,ENABLE);
|
|
|
|
fill_fifo();
|
|
|
|
switch_Tx();
|
|
g_fsk.states = RF_STATE_TX_RUNNING;
|
|
|
|
SX1276FskSetOpMode( RF_OPMODE_TRANSMITTER );
|
|
}
|
|
|
|
|
|
void SX1276Fsk_recrive_Packet(void)
|
|
{
|
|
|
|
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
|
|
|
hal_DIOx_ITConfig(all, DISABLE);
|
|
|
|
SX1276->RegDioMapping1 = packet_DIO0_RxpayloadReady | packet_DIO1_fifoLevel | packet_DIO2_SyncAddress | packet_DIO3_fifoEmpty;
|
|
// LowBat, Data
|
|
SX1276->RegDioMapping2 = packet_DIO4_Rssi_PreambleDetect | packet_DIO5_Data | RF_DIOMAPPING2_MAP_PREAMBLEDETECT;
|
|
|
|
SX1276WriteBuffer( REG_DIOMAPPING1, &SX1276->RegDioMapping1, 2 );
|
|
|
|
SX1276->RegFifoThresh = RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY | RX_FIFO_THRESHOLD; // 24 bytes of data
|
|
SX1276Write( REG_FIFOTHRESH, SX1276->RegFifoThresh );
|
|
|
|
g_fsk.states = RF_STATE_RX_INIT;
|
|
|
|
g_fsk.index = 0;
|
|
|
|
hal_DIOx_ITConfig(4,ENABLE);
|
|
hal_DIOx_ITConfig(0,ENABLE);
|
|
hal_DIOx_ITConfig(1,ENABLE);
|
|
hal_DIOx_ITConfig(2,ENABLE);
|
|
hal_DIOx_ITConfig(3,ENABLE);
|
|
|
|
switch_Rx();
|
|
|
|
SX1276FskSetOpMode( RF_OPMODE_RECEIVER );
|
|
}
|
|
|
|
#if 0
|
|
/*****************************************************************************
|
|
Prototype : GPIO_EVEN_IRQHandler
|
|
Description :
|
|
Input : void
|
|
Output : None
|
|
Return Value :
|
|
Date : 2016/08/15
|
|
Author : Barry
|
|
*****************************************************************************/
|
|
void GPIO_EVEN_IRQHandler(void)
|
|
{
|
|
u32 flags = GPIO->IF;
|
|
GPIO->IFC = flags;
|
|
|
|
if(flags & (1 << sRF_DIO0_PIN) )
|
|
{
|
|
hal_DIOx_ITConfig(all, DISABLE);
|
|
hal_sRF_ClearAllRF_IT();
|
|
|
|
if(g_fsk.states == RF_STATE_TX_RUNNING)
|
|
{
|
|
// Tx done
|
|
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
|
g_fsk.states = RF_STATE_TX_DONE;
|
|
process_post(&hal_RF_process, PROCESS_EVENT_MSG, (void *)(&g_fsk.states));
|
|
}
|
|
|
|
if(g_fsk.states == RF_STATE_RX_SYNC)
|
|
{
|
|
// Rx done
|
|
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
|
read_fifo(true);
|
|
etimer_stop(&timer_rf);
|
|
g_fsk.states = RF_STATE_RX_DONE;
|
|
process_post(&hal_RF_process, PROCESS_EVENT_MSG, (void *)(&g_fsk.states));
|
|
}
|
|
}
|
|
else if (flags & (1 << sRF_DIO2_PIN) )
|
|
{
|
|
if(g_fsk.states == RF_STATE_TX_RUNNING)
|
|
{
|
|
hal_DIOx_ITConfig(all,DISABLE);
|
|
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
|
}
|
|
//sync detect
|
|
if(g_fsk.states == RF_STATE_RX_PREAMBLE)
|
|
{
|
|
hal_DIOx_ITConfig(2,DISABLE);
|
|
etimer_remodify(&timer_rf, g_fsk.plyloadtimeout);
|
|
printf("sync det\r\n");
|
|
g_fsk.states = RF_STATE_RX_SYNC;
|
|
g_fsk.rssi = SX1276FskReadRssi( );
|
|
}
|
|
}
|
|
else if (flags & (1 << sRF_DIO3_PIN) )
|
|
{
|
|
hal_DIOx_ITConfig(all,DISABLE);
|
|
SX1276FskSetOpMode( RF_OPMODE_STANDBY );
|
|
}
|
|
|
|
}
|
|
|
|
|
|
void GPIO_ODD_IRQHandler(void)
|
|
{
|
|
u32 flags = GPIO->IF;
|
|
GPIO->IFC = flags;
|
|
|
|
if (flags & (1 << sRF_DIO1_PIN) )
|
|
{
|
|
if(g_fsk.states == RF_STATE_TX_RUNNING)
|
|
{
|
|
fill_fifo();
|
|
}
|
|
|
|
if(g_fsk.states == RF_STATE_RX_SYNC)
|
|
{
|
|
read_fifo(false);
|
|
}
|
|
}
|
|
else if (flags & (1 << sRF_DIO4_PIN) )
|
|
{
|
|
if(g_fsk.states == RF_STATE_RX_INIT)
|
|
{
|
|
hal_DIOx_ITConfig(4,DISABLE);
|
|
etimer_remodify(&timer_rf, g_fsk.sync_timeout); //²»Ö´ÐÐÕâ¸öµÄ»°£¬ÖжϺ¯ÊýÉÙµãʱ¼ä£¬Ö´ÐеĻ°£¬¿É¿ìËÙÅжϳ¬Ê±
|
|
printf("preamble det\r\n");
|
|
g_fsk.states = RF_STATE_RX_PREAMBLE;
|
|
process_post(&hal_RF_process, PROCESS_EVENT_MSG, (void *)(&g_fsk.states));
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|