241 lines
9.8 KiB
C
241 lines
9.8 KiB
C
/**
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******************************************************************************
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* @file hal_radio.h
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* @author William Liang
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* @version V1.0.0
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* @date 09/10/2013
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* @brief This file contains the headers of the radio frequency handlers.
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __HAL_sRF_H__
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#define __HAL_sRF_H__
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/* Includes ------------------------------------------------------------------*/
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#include "include.h"
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#include "stm32f10x.h"
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#include "sx1276-LoRa.h"
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/* Exported constants --------------------------------------------------------*/
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/**
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* @brief SPI sRF Frequency Chip Interface pins
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*/
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#define sRF_SPI SPI1
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#define sRF_SPI_CLK RCC_APB2Periph_SPI1
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#define sRF_CS_PIN GPIO_Pin_4 /* PA.4 */
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#define sRF_CS_GPIO_PORT GPIOA /* GPIOA */
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#define sRF_CS_GPIO_CLK RCC_APB2Periph_GPIOA
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#define sRF_SPI_SCK_PIN GPIO_Pin_5 /* PB.5 */
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#define sRF_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */
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#define sRF_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOA
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#define sRF_SPI_MISO_PIN GPIO_Pin_6 /* PB.6 */
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#define sRF_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */
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#define sRF_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOA
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#define sRF_SPI_MOSI_PIN GPIO_Pin_7 /* PB.7 */
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#define sRF_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */
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#define sRF_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOA
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#define sRF_SPI_DR_Base (SPI1_BASE + 0x0C)
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#define sRF_SPI_DMA DMA1
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#define sRF_SPI_DMA_CLK RCC_AHBPeriph_DMA1
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#define sRF_SPI_DMA_RX_Channel DMA1_Channel4
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#define sRF_SPI_DMA_TX_Channel DMA1_Channel5
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#define sRF_SPI_DMA_RX_FLAG DMA1_FLAG_TC4
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#define sRF_SPI_DMA_TX_FLAG DMA1_FLAG_TC5
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/* BEGIN: Added by Barry, 2014/3/4 */
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#define sRF_RESET_PORT GPIOA
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#define sRF_RESET_SCK RCC_APB2Periph_GPIOA
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#define sRF_RESET_PIN GPIO_Pin_1
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#define sRF_DIOx_PORT GPIOB
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#define sRF_DIOx_SCK RCC_APB2Periph_GPIOB
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#define sRF_DIO0_PIN GPIO_Pin_13
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#define sRF_DIO1_PIN GPIO_Pin_12
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//#define sRF_DIO2_PIN GPIO_Pin_1
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#define sRF_DIO3_PIN GPIO_Pin_0
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//#define sRF_DIO4_PIN GPIO_Pin_4
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//#define sRF_DIO5_PIN GPIO_Pin_5
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#define sRF_DIO4_PORT GPIOC
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#define sRF_DIO4_PIN GPIO_Pin_5 //PC5
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#define sRF_DIO4_SCK RCC_APB2Periph_GPIOC
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#define sRF_DIO4_PORT_SOURCE GPIO_PortSourceGPIOC
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#define sRF_DIO4_PIN_SOURCE GPIO_PinSource5
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#define sRF_DIOx_PORT_SOURCE GPIO_PortSourceGPIOB
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#define sRF_DIO0_PIN_SOURCE GPIO_PinSource13
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#define sRF_DIO1_PIN_SOURCE GPIO_PinSource12
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#define sRF_DIO2_PIN_SOURCE GPIO_PinSource1
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#define sRF_DIO3_PIN_SOURCE GPIO_PinSource0
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#define DIO0_IRQ EXTI_Line13
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#define DIO1_IRQ EXTI_Line12
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#define DIO2_IRQ EXTI_Line1
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#define DIO3_IRQ EXTI_Line0
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#define DIO4_IRQ EXTI_Line5
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#define DIOall_IRQ (DIO0_IRQ | DIO1_IRQ | DIO2_IRQ | DIO3_IRQ | DIO4_IRQ)
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#define hal_DIOx_ITConfig(n,NewState) hal_sRF_ITConfig(DIO##n##_IRQ,NewState)
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#define sRF_TX_CTRL_PORT GPIOC
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#define sRF_TX_CTRL_PIN GPIO_Pin_4
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#define sRF_FIFO_ARRD 0
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/* END: Added by Barry, 2014/3/4 */
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/* Select sRF: Chip Select pin low */
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#define sRF_CS_LOW() GPIO_ResetBits(sRF_CS_GPIO_PORT, sRF_CS_PIN)
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/* Deselect sRF: Chip Select pin high */
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#define sRF_CS_HIGH() GPIO_SetBits(sRF_CS_GPIO_PORT, sRF_CS_PIN)
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#define RFTX_ENABLE GPIO_SetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN)
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#define RFRX_ENABLE GPIO_ResetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN)
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#define switch_Tx() GPIO_SetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN)
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#define switch_Rx() GPIO_ResetBits(sRF_TX_CTRL_PORT, sRF_TX_CTRL_PIN)
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/* Disable PA */
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#define sRF_PA_DISABLE() GPIO_ResetBits(sRF_PA_CTRL_PORT, sRF_PA_CTRL_PIN)
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/* Enable PA */
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#define sRF_PA_ENABLE() GPIO_SetBits(sRF_PA_CTRL_PORT, sRF_PA_CTRL_PIN)
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#define sRF_DUMMY_BYTE 0xAA
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#define sRF_CRYSTALCAP_EEPROM_ADDR 0xFFC1
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#define sRF_CHANNEL_NUMBER 66u
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#define sRF_PREAMBLE_LENGTH 80u //bytes
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#define sRF_SYNCWORD_LENGTH 2u //bytes
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#define sRF_FREQ_HOP_TIMEOUT 30u//ms
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#define sRF_CHECK_SYNCWORD_TIMEOUT 85u //(((sRF_PREAMBLE_LENGTH + sRF_SYNCWORD_LENGTH) * 8) / 10 + 20) //ms
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#define sRF_FIRST_TX_TIMEOUT 136u //(((sRF_PREAMBLE_LENGTH + sRF_SYNCWORD_LENGTH + FIFO_SIZE) * 8) / 10 + 20) //ms
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#define sRF_FIFO_TRX_TIMEOUT 71u //((FIFO_SIZE * 8) / 10 + 20) //ms
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#define sRF_FIFO_DMA_TIMEOUT 20u //ms
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#define sRF_PACKET_SIZE (aMaxPHYPayloadSize + 6) //258u
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#define sRF_RSSI_SAMPLE_NUMBER 9u
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#define sRF_RSSI_SAMPLE_INTERVAL 2u //ms
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#define sRF_TEST_INTERVAL 1000u //ms
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#define TOTAL_REGISTER_NUMBER 0x70
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#define FIFO_SIZE 255u
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#define RF_TIMEOUT 3000
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#define RXTX( txEnable ) SX1276WriteRxTx( txEnable )
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#define TICK_RATE_MS( ms ) ( ms )
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#define true TRUE
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#define false FALSE
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typedef struct
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{
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u16 version;
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u16 lastBytes;
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u16 total_packets;
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u16 current_packet_No;
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u16 total_bytes;
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u8 packet_length;
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}ST_update_slave_info;
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typedef struct
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{
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u8 CadDetected:1;
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u8 FhssChangeChannel:1;
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u8 CadDone:1;
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u8 TxDone:1;
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u8 ValidHeader:1;
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u8 PayloadCrcError:1;
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u8 RxDone:1;
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u8 RxTimeout:1;
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}ST_irqFlag;
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enum
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{
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RF_ERR = 0x0000,
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RF_CAD_DETECT = 0x0001,
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RF_TX_START = 0x0002,
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RF_TX_SUCCESS = 0x0004,
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RF_RX_SUCCESS = 0x0008,
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RF_RX_FAILED = 0x0010,
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RF_VALID_HEAD = 0x0020,
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RF_SET_PARAMS = 0x0040,
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RF_PREAMBLE_TIMEOUT = 0x0080,
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};
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#endif
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/* Exported macro ------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void hal_InitRFVariable(void);
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void hal_InitRF(void);
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void hal_sRF_InitSPI(void);
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void hal_sRF_ITConfig(uint32_t irqLine, FunctionalState NewState);
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u8 hal_sRF_ReadRegister(u8 reg);
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void hal_sRF_WriteRegister(u8 reg, u8 val);
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void hal_sRF_DMA_Read(u8 startReg, u8 *pBuffer, u8 length);
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void hal_sRF_DMA_Write(u8 *pBuffer, u8 length);
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void hal_sRF_Config(u8 startReg, u8 *pBuffer, u8 length);
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void hal_sRF_Read(u8 startReg, u8 *pBuffer, u8 length);
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void hal_sRF_Receive(void);
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void hal_sRF_Transmit(u8 *pBuffer, u8 length, u8 channel);
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void hal_sRF_ReadRssi(void);
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u8 hal_sRF_GetLinkQuality(void);
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u8 hal_sRF_RssiToLinkQuality(u8 rssi);
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void hal_sRF_FrequencyHopping(void);
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void hal_sRF_WhiteningBuffer(u8 *pBuffer, u16 length);
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bool hal_sRF_CheckPacketValid(u8 *pBuffer, u16 length);
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void hal_sRF_Sync_Handle(void);
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void hal_sRF_TRX_Handle(void);
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u8 spiReadWriteByte(u8 data);
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void SX1276WriteBuffer( uint8_t addr, uint8_t *buffer, uint8_t size );
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void SX1276ReadBuffer( uint8_t addr, uint8_t *buffer, uint8_t size );
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void SX1276Write( uint8_t addr, uint8_t data );
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void SX1276Read( uint8_t addr, uint8_t *data );
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void SX1276WriteFifo( uint8_t *buffer, uint8_t size );
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void SX1276ReadFifo( uint8_t *buffer, uint8_t size );
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void SX1276SetReset( uint8_t state );
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u8 cmp(u8 * buf1, u8* buf2, u8 length);
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void SX1276WriteRxTx( bool txEnable );
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void hal_sRF_SPI_Config(void);
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void sRFTransmitHandle(void);
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void TimeOutHandle(void);
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void hal_sRF_writeFIFO_DMA(u8 * pBuffer, u8 length);
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void hal_sRF_readFIFO_DMA(u8 * pBuffer, u8 length);
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void hal_sRF_Transmit(u8 *pBuffer, u8 length, u8 channel);
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void hal_sRF_FSK_ITConfig( uint32_t irqLine, FunctionalState NewState);
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void hal_sRF_ITConfig(uint32_t irqLine, FunctionalState NewState);
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void hal_sRF_ClearAllRF_IT();
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#define hal_fsk_eit_failing(n,NewState) hal_sRF_FSK_ITConfig(DIO##n##_IRQ,NewState)
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/*!
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* DIO state read functions mapping
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*/
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#define DIO(n) GPIO_ReadInputDataBit( sRF_DIOx_PORT, sRF_DIO##n##_PIN )
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#define DIO0 DIO(0)
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#define DIO1 DIO(1)
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#define DIO2 DIO(2)
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#define DIO3 DIO(3)
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#define DIO4 DIO(4)
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#define DIO5 DIO(5)
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#define DEBUG
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/******************* (C) COPYRIGHT 2013 Robulink Technology Ltd.*****END OF FILE****/
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